Sr. Analog/Mixed-Signal Design Engineer

Sr. Analog/Mixed-Signal Design Engineer

DescriptionPosition at Knowles

Title:                     Analog/Mixed-Signal Design Engineer                                      

Department:         KER R&D            

Location:             Rapperswil, Switzerland

 

COMPANY DESCRIPTION:

Founded in 1946, Knowles Corporation (NYSE: KN) is a market leader and global supplier of advanced micro-acoustic solutions and specialty components serving the mobile communications, consumer electronics, medical technology, military, aerospace and industrial markets. Knowles has a leading position in MEMS microphones, speakers and receivers, used in smartphones, tablets and mobile handsets. Knowles is also a leading manufacturer of transducers used in hearing aids and other medical devices. Knowles’ focus on the customer, combined with unique technology, rigorous testing and global scale, helps to deliver innovative solutions and consistently dependable and precise products. Headquartered in Itasca, Illinois, USA, Knowles has more than 8,000 employees in 25 locations around the world. For more information, visit www.knowles.com.

The KER design center in Switzerland is developing cutting-edge ASICs for MEMS microphones supplied to the world’s leading smartphone manufacturers. The team has a track record of delivering billions of high-performance mixed-signal ASICs to the market over the past decade.

 

SUMMARY DESCRIPTION:

As an Analog/Mixed-Signal Design Engineer, you will be a key player in the ASIC R&D team, designing and architecting state of the art mixed-signal blocks and systems for MEMS microphones. In addition, you will play an important role in supporting complex failure analyses to ensure smooth ramp-ups and high-volume production.

 

SPECIFIC DUTIES AND RESPONSIBILITIES:

• Develop high-performance analog/mixed-signal ASICs from concept to mass production


• Design and verify ASIC building blocks for test and manufacturability in collaboration with the project team


• Develop new block and system architectures


• Present concepts and technical status to stakeholders, including customers


• Perform post-layout simulations to verify performance at block and system level


• Create and patent new IPs


• Work closely with layout engineers to ensure the quality of the design


• Evaluate ASICs in the lab to validate performance of building blocks and systems


• Perform complex root cause analyses of design and process related issues occurring during development, ramp-up and in production

POSITION/TRAINING REQUIREMENTS:

• Degree in electronic engineering or related field


• 5+ years of proven track record in developing high-performance analog or mixed-signal integrated circuits in a consumer or industrial R&D environment


• Experience in designing low-noise, low-power analog circuits is a plus


• Experience with sigma delta ADCs is an advantage


• Strong intuitive and analytical understanding of transistor-level design


• Solid knowledge in EDA tools such as Cadence


• Extensive experience in silicon evaluation and root cause analysis


• Structured, methodical and results-driven personality able to work under pressure


• Strong team player


• Excellent spoken and written communication skills in English