FPGA Design Engineer (VHDL)

Ellisys SA

  • Publication date:

    07 May 2024
  • Workload:

  • Contract type:

    Unlimited employment
  • Place of work:


FPGA Design Engineer (VHDL)

Ellisys is seeking brilliant people, who are highly analytical, capable of thinking “out-of-the-box”, and who are motivated to learn from the best. You will bring a strong programming background to the team, coupled with personal enthusiasm and high energy. Your work will be challenging and diverse and your creativity and proactive approach will be welcomed. You will be contributing to the world's best and most advanced protocol test solution for technologies such as USB, Bluetooth and Wi-Fi.

Your competencies:

  • Strong programming background in VHDL or Verilog
  • Strong experience in high-speed logic design
  • Experience in the Xilinx tools suite is a plus
  • Experience in gigabit transceivers, memory controllers, soft processors is a plus
  • Experience in Xilinx Zynq SOC is a plus
  • Understanding of Object Oriented design is a plus
  • USB, Bluetooth, Wi-Fi or other communication protocol knowledge is a plus
  • Must be analytical, creative and a good communicator
  • Strong team player
  • Fluent English or French

The job:

  • Designing new software components for our protocol analyzers, traffic exercisers and compliance testers
  • Defining and implementing creative algorithms and infrastructures for capturing, processing, storing and displaying large amount of data
  • Finding clever ways to present complex information
  • Designing robust expert systems to validate complex scenarios

This position is open in Geneva, Switzerland.

For consideration please

send your motivation letter and CV as a Word, PDF or text document

to E-Mail schreiben.